4 ms·
You'd think, right? Luckily the ARM dudes came up with Thumb-2, so most (all but 6) of the Cortex-M0+ instructions are actually 16 bit, not 32. (Nice chart at h
by joe_bleau 13y ago
You'd think, right? Luckily the ARM dudes came up with Thumb-2, so most (all but 6) of the Cortex-M0+ instructions are actually 16 bit, not 32. (Nice chart at http://en.wikipedia.org/wiki/ARM_Cortex-M http://en.wikipedia.org/wiki/ARM_Cortex-M .)
But what's even more interesting is to actually compile apps and compare code size. Miro Samek did this for a couple of RTOS-like framesworks and compared across a mix of 8, 16 and 32 bit micro architectures (PIC, 8051, M8C, 68HC08, AVR, MSP430, M16C, ARM7 Thumb, and ARM Cortex-M3 Thumb2). For his test, the MSP430 was the most dense, but Thumb2 wasn't far behind. (http://embeddedgurus.com/state-space/2009/03/insects-of-the-computer-world/ http://embeddedgurus.com/state-space/2009/03/insects-of-the-...)
Of course, there are 4 bit micros out there...
- lgeek 13y ago> ARM dudes came up with Thumb-2 I guess I'm nitpicking, but Cortex-M0+ and Cortex-M0 are basically Thumb only. The only Thumb-2 instructions implemented by these cores are the ones for barriers and transferring data between general purpose registers and special registers. These are: 1) Without an equivalent Thumb instruction 2) Required on the ARM architecture 3) A tiny, tiny percentage of instructions executed or just not used by typical application code. Regarding the linked test, the toolchain and optimisation flags are going to make a significant difference. I wonder how GCC (which is free and probably the most popular) and armcc (which generally produces significantly better output) would fit in there.
- userbinator 13y agoHere's another interesting comparison of code density, in which x86 (not surprisingly?) came out ahead: http://www.researchgate.net/publication/224114307_Code_density_concerns_for_new_architectures/file/32bfe5118fd8e27899.pdf http://www.researchgate.net/publication/224114307_Code_densi...