4 ms·

I'm skeptic of the belt efficiency. Memory storage will be wasted. What do we gain with it ?

• Rusky 13y ago
  From what I understand it would have very similar characteristics to current register renaming. You just get direct access to the whole register file rather than just a few ISA registers. I think it would require some instruction scheduling to make optimal use of it, but that means the silicon doesn't need that logic so cores can be smaller and more efficient.