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Not being an EECS person and having only taken a couple of Intro to Circuits survey courses, can someone fill in my ignorance? EECS people make math convenient

Not being an EECS person and having only taken a couple of Intro to Circuits survey courses, can someone fill in my ignorance? EECS people make math convenient for themselves by pretending that voltage numbers and current numbers cancel out in certain ways. Otherwise they'd have to do really messy calculus. The problem is that this convenience is only true for circuits that are up to a certain speed. Past that speed, that way of calculating and engineering circuits starts to break down. We've hit those speed limits. The field has chosen to react by instead switching to multi-core computers. The problem from a programmer perspective is that parallelism is difficult to write for. The reason it is difficult to write for is because of mutable variables, which are common in imperative languages. So that's driving the popularity of functional languages. However, not as many people are good at functional languages, since they tend to be more mature in academic circles, less mature for industry purposes, and generally more difficult to learn for people that are more used to procedural thinking than mathematical thinking. So, if all those premises and implications are true that would mean that maybe if the EECS people stopped pretending that EECS circuits are simple and started doing the messy calculus, maybe we could start shrinking single-core chips again. But I'm sure I've messed up some of those premises. Anyone?

gizmo686 13y ago
I'm also not an EECS person, so I do not know if we are here yet, but at some point you will have to deal with quantum effects.
- zhemao 13y ago
  We already do have to worry about quantum effects. Electron tunneling is a real concern and one of the causes of chip degradation over operating lifetime. Essentially, an excited electron can jump across the transistor gate oxide and get trapped in the gate metal. If this happens enough, the threshhold voltage of the transistor increases, making it slower.
zhemao 13y ago
what do you mean by "pretending that voltage numbers and current numbers cancel out in certain ways"? The problem is certainly not that our mathematical models are insufficient. Transistor I-V characteristics have been quite complicated for several generations now. That's why circuit designers use computer simulations now, not hand-cranked calculus models. The slow-down in processor speed despite shrinking transistor is due to physical and design limitations. For one, it used to be that you could use more transistors to build more complex pipelines, branch predictors, etc. to allow you to turn up the clock frequency. But now we've reached the point of diminishing returns on this sort of optimization. Also, increasing the frequency increases the power, which causes problems for heat dissipation and chip lifetime. So we've cut back on frequency to lower the power consumption.
ghaff 13y ago
"The field" (esp. Intel) resisted moving to multicore architectures arguably longer than they should have because of the well-known problems that major software makers (esp. desktop (Microsoft) ones) faced with moving wholesale to parallelism as a fundamental requirement. As it's turned out, the transition hasn't been as bad as it might have been for a number of reasons, but "software isn't ready" was very much a driving reason for why the P4 path was followed and (in part) for why Itanium happened.

gizmo686 13y ago

I'm also not an EECS person, so I do not know if we are here yet, but at some point you will have to deal with quantum effects.

zhemao 13y ago
We already do have to worry about quantum effects. Electron tunneling is a real concern and one of the causes of chip degradation over operating lifetime. Essentially, an excited electron can jump across the transistor gate oxide and get trapped in the gate metal. If this happens enough, the threshhold voltage of the transistor increases, making it slower.

zhemao 13y ago

what do you mean by "pretending that voltage numbers and current numbers cancel out in certain ways"? The problem is certainly not that our mathematical models are insufficient. Transistor I-V characteristics have been quite complicated for several generations now. That's why circuit designers use computer simulations now, not hand-cranked calculus models. The slow-down in processor speed despite shrinking transistor is due to physical and design limitations. For one, it used to be that you could use more transistors to build more complex pipelines, branch predictors, etc. to allow you to turn up the clock frequency. But now we've reached the point of diminishing returns on this sort of optimization. Also, increasing the frequency increases the power, which causes problems for heat dissipation and chip lifetime. So we've cut back on frequency to lower the power consumption.

ghaff 13y ago

"The field" (esp. Intel) resisted moving to multicore architectures arguably longer than they should have because of the well-known problems that major software makers (esp. desktop (Microsoft) ones) faced with moving wholesale to parallelism as a fundamental requirement. As it's turned out, the transition hasn't been as bad as it might have been for a number of reasons, but "software isn't ready" was very much a driving reason for why the P4 path was followed and (in part) for why Itanium happened.