Smaller size -> lower capacitance -> lower power consumption during state changes. But smaller size -> larger leakage current -> higher baseline power consumpt

Smaller size -> lower capacitance -> lower power consumption during state changes. But smaller size -> larger leakage current -> higher baseline power consumption. For several years we have been at the point where the curves cross and power consumption is minimal. The strategy going forward is to turn off parts of the chip when they are not in use, or to reallocate functional units to other tasks (a la Hyperthreading).