4 ms·
People who claim that they can't afford the overhead of error checking their instructions are high. There are no realistic situation in which getting the wrong
by gchpaco 17y ago
People who claim that they can't afford the overhead of error checking their instructions are high. There are no realistic situation in which getting the wrong answer fast is better than the right answer one clock cycle slower, especially with the heavily pipelined architectures we have today.
- tedunangst 17y agoIf you think extra branches don't affect the performance of heavily pipelined architectures, I have some Pentium 4s I'd like to sell you. :) Right idea, wrong proof.
- dbenamy 17y agoMy understanding is that this penalty can be mitigated by telling the compiler which way a branch is likely to go so it can optimize the generated code appropriately. I know the linux kernel uses what I think is a gcc specific extension to do this. For a malloc check, the result is almost always the same.
- dmm 17y agoI'm not sure what your system's malloc looks like, but I assure you it's probably full of branches. One more isn't going to make a difference. If you are worried about branches causing pipeline stalls you aren't allocating memory.
- tedunangst 17y agoI was responding to the part at the end where it was implied that heavily pipelined architectures aren't subject to stalls (what else does especially in italics mean?), not the idea that checking for NULL is a performance hit.
- dmm 17y agoAh I totally misread your comment. Sorry about that. Branches can definitely kill performance in heavily pipelined archs.
- gchpaco 17y agoExtra branches are only a problem if the chip guesses wrong about the direction and has to undo a lot of speculative execution. So the default, fast case should be the one where memory is successfully allocated, in which case your total penalty is one compare to null instruction.
- Dove 17y agoPardon my (likely striking) ignorance of hardware, but I remember a discussion from way back in college about pipelines and branches. The gist of it was, you may as well guess at branches, since if you're wrong (and careful), you don't waste any more time than if you hadn't guessed. The discussion went from there into what constituted effective methods for guessing, and I remember a comment to the effect that "do what you did last time" was one of the best strategies. I was left with the impression that hardware did this, though it's possible I misunderstood. Google seems to back me up a bit, but I admit I'm out of my depth on this topic. Anyway, it seems to me that if my recollection were accurate, a single branch which went the same way virtually every time could have a lower cost in a heavily pipelined system than a more distrubted error checking scheme.
- dinkumthinkum 17y agoNo, you didn't misunderstand it and it is called branch prediction and it is done in hardware. I'm surprised no one has brought up this point.
- gchpaco 17y agoAnyway, it seems to me that if my recollection were accurate, a single branch which went the same way virtually every time could have a lower cost in a heavily pipelined system than a more distrubted error checking scheme. That, in a nutshell, was what I was claiming.