3 ms·

Where are the Intel and Via random instructions supposed to be getting their entropy? Edit: thanks for the interesting replies!

by ape4 13y ago

jbri 13y ago
In theory? Quantum and thermal effects inside an unstable configuration of transistors. The simple example is a basic SR latch (two NOR gates, where the output of one gate feeds one of the inputs of the other, and vice versa), where you start things off by applying a signal to both S and R. When you remove the signals, the latch will eventually fall back into one of the two stable states - but which state it ends up in is random. So you can easily produce a stream of bits from a potentially-biased random source, and then do some deterministic massaging of that stream to produced an unbiased stream of random bits.
rst 13y ago
Intel is at least supposed to be using something like a "coin-flip" circuit, which has two stable states and can be forced one way or the other based on thermal noise: http://spectrum.ieee.org/computing/hardware/behind-intels-new-randomnumber-generator http://spectrum.ieee.org/computing/hardware/behind-intels-ne... That output stream may be biased, so it subsequently goes through a "whitening" stage based on AES. (One question I haven't seen an answer to: presuming all the hardware functions as described, would it be possible for a microcode update to change the output --- e.g., by whitening the output of the real-time clock instead of what I'm calling the coin-flip circuit?)
sspiff 13y ago
Usually, electric components with unpredictable timing or behaviour are used to generate randomness. Sometimes they intentionally use noisy or unshielded components to use the noise for randomness. For some physical phenomena that can be exploited for getting entropy from a chip or other hardware, have a look at http://en.wikipedia.org/wiki/Hardware_random_number_generator http://en.wikipedia.org/wiki/Hardware_random_number_generato...

Where are the Intel and Via random instructions supposed to be getting their entropy? Edit: thanks for the interesting replies!

by ape4 13y ago

Where are the Intel and Via random instructions supposed to be getting their entropy? Edit: thanks for the interesting replies!

jbri 13y ago

In theory? Quantum and thermal effects inside an unstable configuration of transistors. The simple example is a basic SR latch (two NOR gates, where the output of one gate feeds one of the inputs of the other, and vice versa), where you start things off by applying a signal to both S and R. When you remove the signals, the latch will eventually fall back into one of the two stable states - but which state it ends up in is random. So you can easily produce a stream of bits from a potentially-biased random source, and then do some deterministic massaging of that stream to produced an unbiased stream of random bits.

rst 13y ago

Intel is at least supposed to be using something like a "coin-flip" circuit, which has two stable states and can be forced one way or the other based on thermal noise: http://spectrum.ieee.org/computing/hardware/behind-intels-new-randomnumber-generator http://spectrum.ieee.org/computing/hardware/behind-intels-ne... That output stream may be biased, so it subsequently goes through a "whitening" stage based on AES. (One question I haven't seen an answer to: presuming all the hardware functions as described, would it be possible for a microcode update to change the output --- e.g., by whitening the output of the real-time clock instead of what I'm calling the coin-flip circuit?)

sspiff 13y ago

Usually, electric components with unpredictable timing or behaviour are used to generate randomness. Sometimes they intentionally use noisy or unshielded components to use the noise for randomness. For some physical phenomena that can be exploited for getting entropy from a chip or other hardware, have a look at http://en.wikipedia.org/wiki/Hardware_random_number_generator http://en.wikipedia.org/wiki/Hardware_random_number_generato...