3 ms·
What, no integer division, multiplication, no floating-point.. Each of these would take a lot of instructions to emulate with the basic 21 instruction, so the C
by zvrba 13y ago
What, no integer division, multiplication, no floating-point.. Each of these would take a lot of instructions to emulate with the basic 21 instruction, so the CPU would need to run on at least 100GHz to match the performance of today's CPUs.
Plus, since it's a stack machine, you'd lose all the goodies of superscalar, OoO execution, etc. (there's constant contention on the top of stack)
CISC has won (heck, even ARM is not RISC anymore). Deal with it :)
- rdc12 13y agoPfft RISC won, x86 has an internal RISC core now days
- lgeek 13y ago> CISC has won (heck, even ARM is not RISC anymore). Deal with it :) If by RISC you literally mean a reduced number of instructions, I guess that's a valid point. But RISC is mostly used to describe instruction sets in which each instruction performs a limited amount of work, especially memory accesses. That's why RISC architectures are generally load/store, while CISC architectures allow access to multiple discontinuous memory areas in a single instruction. By the way, modern x86 chips are RISC machines that translate the x86 instruction set to native microcode.