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You can code bugs and security failures into a FPGA as well as in software.
by informatimago 13y ago
You can code bugs and security failures into a FPGA as well as in software.
- klez 13y agoYes, but you depend less on bugs caused by levels of abstraction below your code, such as runtimes, OSes etc.
- nilliams 13y agoOnly a win if you have some reason to believe your code will be any less buggy when you inevitably start on your own ad-hoc reimplementations of those abstractions.
- bri3d 13y agoBetween writing and formally verifying HDL, logic synthesis (often using third-party or vendor-provided blocks or soft IP, mind you), behavioral and logic simulation (software!), layout, MDP, and building test harnesses that actually test the final hardware, I would actually trust a lower-level language compiled using a well-known compiler and running on a small RTOS on a proven CPU more than I'd trust a new design synthesized into FPGA or especially ASIC form.