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The main advantage is that it's exceptionally power-efficient. Take a look at the chart on these slides[1] for more details. It gets this efficiency despite bei

by tikhonj 13y ago

The main advantage is that it's exceptionally power-efficient. Take a look at the chart on these slides[1] for more details. It gets this efficiency despite being manufactured with relatively outdated methods--if I'm not mistaken, it has 150nm transitors! [1]: http://www.greenarraychips.com/home/news/docs/GreenArrays-Forth-Day-2012.pdf http://www.greenarraychips.com/home/news/docs/GreenArrays-Fo... My understanding is that it's power efficient because the stack-based design allows you to transfer very little data in and out of registers. Additionally, the chip is very simple, has very few transistors and no clock. All this helps save power. Also, the cores can power down very quickly when they're not used, meaning you only pay the energy cost of the ones you are using at the moment. Of course, you shouldn't take my word for it: I'm desperately not a hardware person. I've heard several compelling ideas for using these chips. They're a good fit for small, simple devices that need a long battery life: things like sensors in everyday goods and such, think "internet of things". Another possibility is using them in phones so that the main, power-hungry chip could go to sleep leaving a chip like this to monitor inputs and awaken the phone if needed.

jbri 13y ago
I believe the big reason for the power-efficiency is that it's entirely clockless - the power consumption of an idle transistor is very low compared to one that's switching, and a central clock causes many, many transistors to switch every clock cycle. Being clockless is another way to only pay the power cost for silicon that's actually doing something. Another thing I've been looking at it for is that the design makes it very easy to bit-bang protocols - if you can't get an off-the-shelf chip to speak a protocol for you, using one of these is far cheaper than sticking an FPGA in there, and is similarly cheaper (and easier to patch later) than getting a custom chip unless you're doing a truly massive run of devices.
- tubs 13y ago
  While this is somewhat true, it becomes less relevant over time. As transistor size shrinks, leakage and static power loss becomes more and more of an issue. http://www.ruf.rice.edu/~mobile/elec518/readings/DevicesAndCircuits/kim03leakage.pdf http://www.ruf.rice.edu/~mobile/elec518/readings/DevicesAndC... AMULET was an attempt to make a commercial async chip and it flopped pretty early, one of the reasons being interfacing with anything else in the entire world kinda requires a clock. http://apt.cs.manchester.ac.uk/projects/processors/amulet/ http://apt.cs.manchester.ac.uk/projects/processors/amulet/
  - hershel 13y ago
    Due to leakage current , for some types of applications it doesn't make sense to make the transistor size shrink. For example , energy micro, one of the leaders in low power microcontrollers use the very old 130nm process, same as those FA18A chips.
gjm11 13y ago
What that chart reports is, in effect, energy per instruction executed. By that metric, the GA144 indeed does extremely well. But not all instructions are equal, and it's far from obvious what the right conversion factor is between F18A instructions and, say, ARM instructions. My guess (based on pure industrial-grade ignorance) is that about half the gap between the GA144 and, say, the ARM Cortex-A9, would go away if you corrected for the difference in useful work done per instruction. The GA144 still comes out looking good even if that's so. But in that chart it looks miraculous and I think that's a bit of an illusion.
- gnuarm 13y ago
  The GA144 gets its efficiency from the fact that everything about the design is simple and it uses very few transistors. How many transistors in an A9? The async nature of the GA144 processors saves power if they are stalled, waiting for something to happen. But if they are in a spin loop doing timing, they are as inefficient as any other MCU. The static power is very low because they aren't using state of the art, low voltage processes with leaky transistors. With Vcc at 1.8 V the transistors can turn on and off hard. I think it is a mistake to compare the GA144 to an ARM. They are not really designed for the same sorts of tasks. There are big ARMs for large memory apps which the GA144 is entirely unsuited to and there are small ARMs with more limited memory that have no where near the power of the GA144. But then the GA144 with all processors running flat out uses power like the big ARM... so where is the right comparison? I compare the GA144 to FPGAs. The GA144 has an array of very small processors with very limited memory. But they can be viewed as very beefy logic blocks that execute sequentially rather than parallel logic. To use the GA144 for something useful you need to design your app to suit. Thinking of it as a standard CPU won't get you very far. You won't be running a useful version of Linux on the GA144 and it is too expensive to suit toaster type apps. But it might be the right device for any number of embedded apps that need raw performance like hearing aids or other signal processing apps. I'm not sure what the GA144 would be great at. I can find a few apps it would be good for such as a small analog I/O board I currently build and need to respin because the FPGA is EOL. But I'm not sure I would ever use the GA144 for this product because it may go EOL at any time depending on the company. They are very small and I see no sign they are getting bigger. Will they be around in 5 years, 10 years?
hershel 13y ago
This is not exceptionally power efficient. It does around 90 gigaops/sec(probably 5bit ops) and programmable only in forth. Parallela has a chip that does 90 gflops/watt and is programmable in c/open-cl/r and maybe other tools. That's much more usefulland power efficient. But what about better manufacturing technologies for the F18A chip ? first, it negates some of the advantages of working asynchronously , because the much higher leakage current. Second, the processors game was always about software tools and ecosystems, which is the weak point of the F18A, and without solving this , we won't see it in more advanced manufacturing processes.
- boomlinde 13y ago
  Actual power efficiency depends on the application of the CPU. If you have a use case that mostly leaves the CPU in an idle state only to react on occasional events, the F18A would probably be more efficient than the Parallela chip.
- astrobe_ 13y ago
  You are comparing apple and oranges here. Programming the F18A directly in Forth allows for much more control over what is executed. I would say that on the contrary, if one is ready or have t put the necessary efforts into it, the chips can be extremely efficient. Provided you're not trying to do silly things like running an OS on it... The manufacturing process might not be up to date, but that's precisely, I believe, one of the strengths of the chip: very low power consumption with cheaper manufacturing process.

by tikhonj 13y ago

jbri 13y ago

I believe the big reason for the power-efficiency is that it's entirely clockless - the power consumption of an idle transistor is very low compared to one that's switching, and a central clock causes many, many transistors to switch every clock cycle. Being clockless is another way to only pay the power cost for silicon that's actually doing something. Another thing I've been looking at it for is that the design makes it very easy to bit-bang protocols - if you can't get an off-the-shelf chip to speak a protocol for you, using one of these is far cheaper than sticking an FPGA in there, and is similarly cheaper (and easier to patch later) than getting a custom chip unless you're doing a truly massive run of devices.

tubs 13y ago
While this is somewhat true, it becomes less relevant over time. As transistor size shrinks, leakage and static power loss becomes more and more of an issue. http://www.ruf.rice.edu/~mobile/elec518/readings/DevicesAndCircuits/kim03leakage.pdf http://www.ruf.rice.edu/~mobile/elec518/readings/DevicesAndC... AMULET was an attempt to make a commercial async chip and it flopped pretty early, one of the reasons being interfacing with anything else in the entire world kinda requires a clock. http://apt.cs.manchester.ac.uk/projects/processors/amulet/ http://apt.cs.manchester.ac.uk/projects/processors/amulet/
- hershel 13y ago
  Due to leakage current , for some types of applications it doesn't make sense to make the transistor size shrink. For example , energy micro, one of the leaders in low power microcontrollers use the very old 130nm process, same as those FA18A chips.

gjm11 13y ago

What that chart reports is, in effect, energy per instruction executed. By that metric, the GA144 indeed does extremely well. But not all instructions are equal, and it's far from obvious what the right conversion factor is between F18A instructions and, say, ARM instructions. My guess (based on pure industrial-grade ignorance) is that about half the gap between the GA144 and, say, the ARM Cortex-A9, would go away if you corrected for the difference in useful work done per instruction. The GA144 still comes out looking good even if that's so. But in that chart it looks miraculous and I think that's a bit of an illusion.

gnuarm 13y ago
The GA144 gets its efficiency from the fact that everything about the design is simple and it uses very few transistors. How many transistors in an A9? The async nature of the GA144 processors saves power if they are stalled, waiting for something to happen. But if they are in a spin loop doing timing, they are as inefficient as any other MCU. The static power is very low because they aren't using state of the art, low voltage processes with leaky transistors. With Vcc at 1.8 V the transistors can turn on and off hard. I think it is a mistake to compare the GA144 to an ARM. They are not really designed for the same sorts of tasks. There are big ARMs for large memory apps which the GA144 is entirely unsuited to and there are small ARMs with more limited memory that have no where near the power of the GA144. But then the GA144 with all processors running flat out uses power like the big ARM... so where is the right comparison? I compare the GA144 to FPGAs. The GA144 has an array of very small processors with very limited memory. But they can be viewed as very beefy logic blocks that execute sequentially rather than parallel logic. To use the GA144 for something useful you need to design your app to suit. Thinking of it as a standard CPU won't get you very far. You won't be running a useful version of Linux on the GA144 and it is too expensive to suit toaster type apps. But it might be the right device for any number of embedded apps that need raw performance like hearing aids or other signal processing apps. I'm not sure what the GA144 would be great at. I can find a few apps it would be good for such as a small analog I/O board I currently build and need to respin because the FPGA is EOL. But I'm not sure I would ever use the GA144 for this product because it may go EOL at any time depending on the company. They are very small and I see no sign they are getting bigger. Will they be around in 5 years, 10 years?

hershel 13y ago

This is not exceptionally power efficient. It does around 90 gigaops/sec(probably 5bit ops) and programmable only in forth. Parallela has a chip that does 90 gflops/watt and is programmable in c/open-cl/r and maybe other tools. That's much more usefulland power efficient. But what about better manufacturing technologies for the F18A chip ? first, it negates some of the advantages of working asynchronously , because the much higher leakage current. Second, the processors game was always about software tools and ecosystems, which is the weak point of the F18A, and without solving this , we won't see it in more advanced manufacturing processes.

boomlinde 13y ago
Actual power efficiency depends on the application of the CPU. If you have a use case that mostly leaves the CPU in an idle state only to react on occasional events, the F18A would probably be more efficient than the Parallela chip.
astrobe_ 13y ago
You are comparing apple and oranges here. Programming the F18A directly in Forth allows for much more control over what is executed. I would say that on the contrary, if one is ready or have t put the necessary efforts into it, the chips can be extremely efficient. Provided you're not trying to do silly things like running an OS on it... The manufacturing process might not be up to date, but that's precisely, I believe, one of the strengths of the chip: very low power consumption with cheaper manufacturing process.