4 ms·
I hope by "Perform an atomic store of the new isa value." he means "Perform an atomic compare-and-set of the new isa value." A64 doesn't eliminate conditional
by Scaevolus 13y ago
I hope by "Perform an atomic store of the new isa value." he means "Perform an atomic compare-and-set of the new isa value."
A64 doesn't eliminate conditional execution completely. It just pares it down to the basics: branch (obviously), add/sub, select, compare (for flattening conditionals like `a && b && c`).
Another thing removed from A32 was the optional shift on operand 2-- which was taking up 7/32 bits for most instructions.
This has a few more that were missed: http://nominolo.blogspot.com/2012/07/arms-new-64-bit-instruction-set.html http://nominolo.blogspot.com/2012/07/arms-new-64-bit-instruc...
- mikeash 13y agoIt's not a compare-and-set. Rather, it uses ARM's atomic instructions where the load creates a reservation on the memory address, and the store succeeds only if the reservation is still present, with any other stores to that address (or nearby addresses) breaking the reservation. You can use this pattern to implement compare-and-set, but you don't need compare-and-set to use that pattern directly. Edit: I wasn't sure how to encode this into the steps in the article, so it's a bit vague on that part. Suggestions welcome.
- scott_s 13y agoAlso commonly called load-link, store-conditional: http://en.wikipedia.org/wiki/Load-link/store-conditional http://en.wikipedia.org/wiki/Load-link/store-conditional