This happens to be my area of expertise and is exactly true. Basic DFT would prevent this from happening without a customer knowing. Also, anything below 65nm a

This happens to be my area of expertise and is exactly true. Basic DFT would prevent this from happening without a customer knowing. Also, anything below 65nm and the chip is almost certain to have stuck@ scan testing at the minimum. The chip would be marked bad during production and tossed out. The only way in todays market this could get through is if the design was intentionally done this way, otherwise the test vectors would not match the silicon. EDIT: After reading more about their decision to use LBIST for this logic I could see a possible back door, but it does up the complexity of this hack. In my opinion this is a very low probability attack vector. It would be much easier to just pay off a disgruntled designer.