Neverd did any ASIC but I know they have about 10X the testing and simulation that FPGA have. My spouse designs CPUs for a major CPU manufacturer (you've used

Neverd did any ASIC but I know they have about 10X the testing and simulation that FPGA have. My spouse designs CPUs for a major CPU manufacturer (you've used them). She is responsible for physical design for one tile (there are many tiles, each of which has other physical designers). Her single tile, by itself, is substantially larger than almost all ASIC designs in the world today. At that scale, most of the standard FPGA design tools don't even work. Designing in that space is substantially different than FPGA or even ASIC design.