3 ms·
Yep. Fond memories of writing an execution trace disassembler for the i960CA back in the early 90s. The chip had an 8-bit incremental trace bus, which made it p
by jes 13y ago
Yep. Fond memories of writing an execution trace disassembler for the i960CA back in the early 90s. The chip had an 8-bit incremental trace bus, which made it possible to produce an execution-time instruction trace, as long as the code didn't modify the instructions in memory.
- kps 13y agoI wrote and instruction scheduler for the i960CA, which was fun. (For those who don't know, the i960CA was the first superscalar microprocessor.) It took assembly code as input and contained (as close as I could get from public docs to) a cycle accurate timing simulator. Less fun was the associated project of getting the GNU assembler and linker to run under 16-bit DOS. I recall that at the the time the linker consisted of one giant source file, and one of the tools (I think the assembler) contained the wonderful declaration: int malloc();