Typically, a converter is fed (or generates internally) a few clocks at multiples of the base sample rate. Depending on the CODEC the highest clock could be 256

Typically, a converter is fed (or generates internally) a few clocks at multiples of the base sample rate. Depending on the CODEC the highest clock could be 256baseFS or even 512baseFS. At a common rate of 48kHz (which cleanly divides samples into both 30fps and 8kHz USB uFrames) this ends up at 24.576MHz. Keeping the clocks running makes it easier to start streaming audio. Otherwise, restarting the clocks means you have to wait for them to settle before pulling the ADC out of reset. After that you have to flush buffers, align samples for phase/latency, and artificially zero the input stream until the rest of the circuitry settles down. Keeping the clocks running means turning the input on or off is only a matter of passing the audio samples or passing zeros. Also, if the system isn't grounded properly then the analog input could definitely find its way onto the 24.576MHz MClk. In the audio world, digital noise leaking into the audio stream is universally bad while no one usually bats an eye at analog leaking into the digital domain. It's definitely lazy from a security standpoint but probably not intentional.