3 ms·
The Cortex-M3 and M4 ARMs are Mostly Harvard; just pored through the datasheets to make sure. The first half a gig of address space has a separate bus for code
by Sanddancer 13y ago
The Cortex-M3 and M4 ARMs are Mostly Harvard; just pored through the datasheets to make sure. The first half a gig of address space has a separate bus for code and data, and then has yet another bus for all the memory space above that. They're weird little chips.
- duskwuff 13y agoIt's all the same data and the same address space, though. The first half-gig or so of memory is all flash ROM, so the separate bus just gives the CPU an extra load per cycle (so it can load data from ROM without a wait state). This doesn't make it a Harvard architecture, it just makes it faster.