At this point, an "improved" design would have to mean algorithmic improvements to a hardware SHA algorithm (i.e. not likely). Improvements that you can actual

At this point, an "improved" design would have to mean algorithmic improvements to a hardware SHA algorithm (i.e. not likely). Improvements that you can actually count on would be die shrinks, but these will provide returns in accordance with the tail end of Moore's law. Compared to the multiple-order-of-magnitude improvements from the CPU -> GPU/FPGA -> ASIC jumps, these improvements likely won't even be worth writing home about.