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It's genuinely complicated; if Xilinx could disrupt Altera by making easier-to-use tools, it would. (In fact it tries with AutoESL.) I hope to explain why FPGA

by _yosefk 13y ago

It's genuinely complicated; if Xilinx could disrupt Altera by making easier-to-use tools, it would. (In fact it tries with AutoESL.) I hope to explain why FPGA tooling is intrinsically hard in my next write-up.

amirhirsch 13y ago
here's a few good reasons why it's hard to make easy-to-use vendor-neutral FPGA tools: - all the devices/bitstream formats are proprietary with little or no documentation of the logic blocks or programmable interconnect structures. it is probably technically easier to build a new FPGA from scratch and design tools for that, than to reverse engineer existing chips [1] - there is very little cross-compatibility between vendor products (a 4-lut here, a 6-lut there, some carry-chain logic here, a DSP block there) - all the optimizations (synthesis, place-and-route) are NP-hard problems - sequential imperative (C-like) thinking is not the correct way to make parallel systems - the FPGA vendors compete on tools and offer their software for free to push hardware. hard for an independent vendor to compete. [1] some reverse engineering efforts exist. see "From the bitstream to the netlist" http://citeseerx.ist.psu.edu/viewdoc/download?doi=10.1.1.117.6043&rep=rep1&type=pdf http://citeseerx.ist.psu.edu/viewdoc/download?doi=10.1.1.117... / http://code.google.com/p/debit/ http://code.google.com/p/debit/
- alok-g 13y ago
  While I find your comment informative, points 3 and 4 do not really explain why vendor-neutral tools cannot exist. Point 2 (my best understanding) should not be a breaking issue if documentation and specifications are available (which is covered by point 1). It seems to me that point 5 is part of the thing they have done to prevent alternative tools to come to market. Lastly, point 1 is exactly what begs for disruption.
  - makomk 13y ago
    The manufacturers also treat the exact implementation details of their FPGAs - how exactly all the routing fabric is structured, the fine details of some of the macros, etc - to be their secret sauce that gives them an edge over their competitors. So they're pretty hostile to the idea of documenting anything.
- deleted 13y ago
  [deleted]
- mjn 13y ago
  all the optimizations (synthesis, place-and-route) are NP-hard problems I suspect this one in particular could be chipped away at pretty successfully if the tooling were less closed. When you get some open benchmarks and let both researchers and systems-builders hack away at it, you can get very good practical solutions to NP-hard problems, as the current crop of SAT-solvers, SMT engines, and TSP-routing tools attest.
  - amirhirsch 13y ago
    I wrote an post 5 years ago about how an electronic-design-automation-as-a-service company could sell access to a huge supercomputer for solving these problems faster: http://fpgacomputing.blogspot.com/2008/08/megahard-corp-open-source-eda-as.html http://fpgacomputing.blogspot.com/2008/08/megahard-corp-open... most researchers make up their own architectures to demonstrate place-and-route algorithms, for example there is this challenge to improve p&r: http://www.eecg.toronto.edu/~vaughn/challenge/challenge.html http://www.eecg.toronto.edu/~vaughn/challenge/challenge.html
- fieldforceapp 13y ago
  Commercial "vendor neutral" tools do exist, Synplicity was a public company which sold such tools for several years before branching into proto board hardware sales and then being acquired by Synopsys [1]. Their tools for synthesis, partitioning and debug are still available [2] and strong sellers to both Altera and Xilinx FPGA developers. [1] http://news.synopsys.com/index.php?s=43&item=570 http://news.synopsys.com/index.php?s=43&item=570 [2] http://www.synopsys.com/Tools/Implementation/FPGAImplementation/FPGASynthesis/Pages/SynplifyPremier.aspx http://www.synopsys.com/Tools/Implementation/FPGAImplementat...
bhb916 13y ago
It being "hard" shouldn't give them a pass on quality control. From the early Project Navigator to ISE to Vivado, Xilinx tools are buggy, poorly documented, and completely unintuitive. Yet, they're still better than Altera's.
- alok-g 13y ago
  I had never used Altera. It's sad to hear that it is even worse!
  - bhb916 13y ago
    I moved one of our smaller projects over to Altera because they were first to 28nm plus the local Altera team was willing to help out with porting any device-specific code. I was very disappointed with the tools. It's worth a write-up all on it's own, but my staff struggled through the tooling which consumed most of their time.
    - alok-g 13y ago
      Just asking, not questioning: Are you sure they would not have similarly struggled if they were pros in Altera and were moving to Xilinx? An issue with counter-intuitive and buggy tools is exactly that you get used to them, your mind slowly forgets how messy a design the tools have, and now everything else seems counter-intuitive.
      - bhb916 13y ago
        That's a good question. It's almost impossible to tell objectively. I would say that the Altera tools felt more like circa 2007 Xilinx Tools. They lacked quality control AND maturity. This is all very subjective, though.
        djcapelis 13y ago
        Ugh. I remember 2007 Xilinx tools and I wouldn't wish them on anyone. I was so surprised when I started doing FPGA work again and found even the old ISE versions I'm using (2010/2011-ish) are so much better! I have access to newer software, but the designs I'm working with don't import correctly into them. :-P
mjn 13y ago
I'm waiting for Chuck Moore to release 2kb of Forth that he claims replaces the only parts you need...
alok-g 13y ago
@_yosefk: I am interested in this write-up. Will wait for it. Thanks
fnordfnordfnord 13y ago
Please do. I have some opinions here and I wish I was prepared to make good comments. I've seen some horrible things. I hope you give it as thorough a going-over as you did in this article.

by _yosefk 13y ago

amirhirsch 13y ago

here's a few good reasons why it's hard to make easy-to-use vendor-neutral FPGA tools: - all the devices/bitstream formats are proprietary with little or no documentation of the logic blocks or programmable interconnect structures. it is probably technically easier to build a new FPGA from scratch and design tools for that, than to reverse engineer existing chips [1] - there is very little cross-compatibility between vendor products (a 4-lut here, a 6-lut there, some carry-chain logic here, a DSP block there) - all the optimizations (synthesis, place-and-route) are NP-hard problems - sequential imperative (C-like) thinking is not the correct way to make parallel systems - the FPGA vendors compete on tools and offer their software for free to push hardware. hard for an independent vendor to compete. [1] some reverse engineering efforts exist. see "From the bitstream to the netlist" http://citeseerx.ist.psu.edu/viewdoc/download?doi=10.1.1.117.6043&rep=rep1&type=pdf http://citeseerx.ist.psu.edu/viewdoc/download?doi=10.1.1.117... / http://code.google.com/p/debit/ http://code.google.com/p/debit/

alok-g 13y ago
While I find your comment informative, points 3 and 4 do not really explain why vendor-neutral tools cannot exist. Point 2 (my best understanding) should not be a breaking issue if documentation and specifications are available (which is covered by point 1). It seems to me that point 5 is part of the thing they have done to prevent alternative tools to come to market. Lastly, point 1 is exactly what begs for disruption.
- makomk 13y ago
  The manufacturers also treat the exact implementation details of their FPGAs - how exactly all the routing fabric is structured, the fine details of some of the macros, etc - to be their secret sauce that gives them an edge over their competitors. So they're pretty hostile to the idea of documenting anything.
deleted 13y ago
[deleted]
mjn 13y ago
all the optimizations (synthesis, place-and-route) are NP-hard problems I suspect this one in particular could be chipped away at pretty successfully if the tooling were less closed. When you get some open benchmarks and let both researchers and systems-builders hack away at it, you can get very good practical solutions to NP-hard problems, as the current crop of SAT-solvers, SMT engines, and TSP-routing tools attest.
- amirhirsch 13y ago
  I wrote an post 5 years ago about how an electronic-design-automation-as-a-service company could sell access to a huge supercomputer for solving these problems faster: http://fpgacomputing.blogspot.com/2008/08/megahard-corp-open-source-eda-as.html http://fpgacomputing.blogspot.com/2008/08/megahard-corp-open... most researchers make up their own architectures to demonstrate place-and-route algorithms, for example there is this challenge to improve p&r: http://www.eecg.toronto.edu/~vaughn/challenge/challenge.html http://www.eecg.toronto.edu/~vaughn/challenge/challenge.html
fieldforceapp 13y ago
Commercial "vendor neutral" tools do exist, Synplicity was a public company which sold such tools for several years before branching into proto board hardware sales and then being acquired by Synopsys [1]. Their tools for synthesis, partitioning and debug are still available [2] and strong sellers to both Altera and Xilinx FPGA developers. [1] http://news.synopsys.com/index.php?s=43&item=570 http://news.synopsys.com/index.php?s=43&item=570 [2] http://www.synopsys.com/Tools/Implementation/FPGAImplementation/FPGASynthesis/Pages/SynplifyPremier.aspx http://www.synopsys.com/Tools/Implementation/FPGAImplementat...

bhb916 13y ago

It being "hard" shouldn't give them a pass on quality control. From the early Project Navigator to ISE to Vivado, Xilinx tools are buggy, poorly documented, and completely unintuitive. Yet, they're still better than Altera's.

alok-g 13y ago
I had never used Altera. It's sad to hear that it is even worse!
- bhb916 13y ago
  I moved one of our smaller projects over to Altera because they were first to 28nm plus the local Altera team was willing to help out with porting any device-specific code. I was very disappointed with the tools. It's worth a write-up all on it's own, but my staff struggled through the tooling which consumed most of their time.
  - alok-g 13y ago
    Just asking, not questioning: Are you sure they would not have similarly struggled if they were pros in Altera and were moving to Xilinx? An issue with counter-intuitive and buggy tools is exactly that you get used to them, your mind slowly forgets how messy a design the tools have, and now everything else seems counter-intuitive.
    - bhb916 13y ago
      That's a good question. It's almost impossible to tell objectively. I would say that the Altera tools felt more like circa 2007 Xilinx Tools. They lacked quality control AND maturity. This is all very subjective, though.
      - djcapelis 13y ago
        Ugh. I remember 2007 Xilinx tools and I wouldn't wish them on anyone. I was so surprised when I started doing FPGA work again and found even the old ISE versions I'm using (2010/2011-ish) are so much better! I have access to newer software, but the designs I'm working with don't import correctly into them. :-P

mjn 13y ago

I'm waiting for Chuck Moore to release 2kb of Forth that he claims replaces the only parts you need...

alok-g 13y ago

@_yosefk: I am interested in this write-up. Will wait for it. Thanks

fnordfnordfnord 13y ago

Please do. I have some opinions here and I wish I was prepared to make good comments. I've seen some horrible things. I hope you give it as thorough a going-over as you did in this article.