Sorry about that, you can see I'm kind of getting clobbered below. I don't think the problem is that the end result isn't a computer (it certainly sounds like

Sorry about that, you can see I'm kind of getting clobbered below. I don't think the problem is that the end result isn't a computer (it certainly sounds like it is), but that the computer only runs in the provided simulator, and is written in a custom HDL designed to make this project relatively simple. The simulator itself ignores a bunch of complexities around timing that a commercial one (like ModelSim) would consider. Personally I haven't done this class, but I'd be curious to know whether the students design the control unit and data path themselves. I know that was a giant pain in the ass when I did it for a gimped RISC processor (as you described).