3 ms·
IIRC the seaforth chips were designed to have blocking reactive IO at ports on each processor, so there was no need to waste cycles waiting on IO or explicitly
by JulianMorrison 18y ago
IIRC the seaforth chips were designed to have blocking reactive IO at ports on each processor, so there was no need to waste cycles waiting on IO or explicitly driving peripherals, you just coded as if the stream was continuous.
- listic 18y agoYes, you're right. In Seaforth's case inter-processor communication and I/O shouldn't eat cycles on its own. I wish we could use some of this technology.