It is a 13x13 array with 5 chopped off to make space. That goes down to 164, but there are three special purpose processors added back in to get up to 167. If

It is a 13x13 array with 5 chopped off to make space. That goes down to 164, but there are three special purpose processors added back in to get up to 167. If you can open a PowerPoint presentation you can read about the chip at http://www.ece.ucdavis.edu/vcl/pubs/2008.06.symp.vlsi/vlsi_symp08_presentation_final.ppt http://www.ece.ucdavis.edu/vcl/pubs/2008.06.symp.vlsi/vlsi_s... Also worth noting that although they do an 802.11a receiver in 20-30 cores, they use two big chunks of special purpose silicon for a Viterbi decoder and an FFT. I'd be curious to know how many more cores it takes without the special purpose hardware, if it is even possible.