5 ms·
Mark 1 FORTH Computer
- rbanffy 13y agoOne of my graduation projects was a processor. Halfway through the design, I decided to ditch most of the registers and make it into a mostly stack-based machine. Since it was never built (the project was to design a processor), I imagine it was very far from buildable. It would probably be expensive for the late 80's too - the printed OrCAD files occupied an area larger than my room and chip count was a couple hundred ICs.
- aklein 13y agoKiller! Does anyone know good (free) software to build a computer (simulation), to test a design? Did you utilize any software in your specs?
- Cieplak 13y agohttp://www.nand2tetris.org/software.php http://www.nand2tetris.org/software.php
- spiritplumber 13y agohttp://code.google.com/p/propforth/ http://code.google.com/p/propforth/ Not sure if it counts.
- noselasd 13y agoThere's a lot of CPUs around in VHDL or Verilog, e.g. * http://opensource.zylin.com/zpu.htm http://opensource.zylin.com/zpu.htm * http://www.altera.com/devices/processor/nios2/ni2-index.html http://www.altera.com/devices/processor/nios2/ni2-index.html You could use ghdl , http://ghdl.free.fr/ http://ghdl.free.fr/, and supporting tools for simulation. Most FPGA vendors have a free version of their tools as well.
- marshray 13y agoI would start with http://www.veripool.org/wiki/verilator http://www.veripool.org/wiki/verilator .
- femto 13y agoApart from being a neat project, this is a good demonstration of how far we have come since TTL. Today you can buy a ten pack of 144 forth computers on a single chip (= 1440 CPUs) for USD200 [1]. Each asynchronous CPU has a claimed instruction cycle of ~1.8ns, giving each array of 144 CPUs a peak of 96 billion operations per second with 650mW dissipated. I don't write this to belittle the Mark 1. I just love the juxtaposition of old and new. [1] http://www.greenarraychips.com/home/products/index.html http://www.greenarraychips.com/home/products/index.html