> That rule of thumb seems to apply to only a particular class of chips. Wouldn't the number of pins be somehow proportional to the power draw, as at higher cur

> That rule of thumb seems to apply to only a particular class of chips. Wouldn't the number of pins be somehow proportional to the power draw, as at higher currents induction would become a more severe problem? I think it depends on the chip's speed. The problem is with rapid changes in current. Of course, higher currents can also have higher fluctuations. > With the power voltage dropping below ground, that unless you had a floating ground, that'd be implying reverse flow of current, negative voltage, right? Or are you talking about a non-zero voltage ground? Suppose the board's ground rail is 0 V and the power rail is at 12 V. The chip's ground voltage might bounce up to 9 and its power down to 8. It does cause reverse currents and other bad effects.