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Comparing it with a GPU is a natural discussion to have. I believe there is more information on their website to answer the question. But maybe someone else c
by amalag 14y ago
Comparing it with a GPU is a natural discussion to have. I believe there is more information on their website to answer the question. But maybe someone else can explain the programming paradigm difference.
http://www.adapteva.com/introduction/ http://www.adapteva.com/introduction/
- mkl 14y agoEach of the 64 cores can independently run arbitrary C/C++ code, which is much more flexible than a GPU. Each core has 32KB of local memory, which can also be accessed by the other cores, and there's 1GB of external memory too. Specs: http://www.adapteva.com/products/silicon-devices/e64g401/ http://www.adapteva.com/products/silicon-devices/e64g401/ Architecture: http://www.adapteva.com/wp-content/uploads/2012/10/epiphany_arch_reference_3.12.10.03.pdf http://www.adapteva.com/wp-content/uploads/2012/10/epiphany_... SDK docs: http://www.adapteva.com/wp-content/uploads/2013/04/epiphany_sdk_reference.4.13.03.301.pdf http://www.adapteva.com/wp-content/uploads/2013/04/epiphany_...
- jareds 14y agoI wonder how much work it would take to port cpuminer to this platform for use in mining bitcoins and litecoins. Probably not worth it for bitcoins with the new FPGA hardware but could be interesting for litecoin depending on the memory access speed to main memory.
- josephagoss 14y agoYou mean the new ASIC hardware? The FPGA are ancient in the crazy world of Bitcoin, although a Litecoin FPGA will emerge in the next few month considering Litecoins value.
- jareds 14y agoLooks like I was about a year behind.
- wladimir 14y agoInteresting architecture. I like how well-documented everything is. Usually, either the low-level ISA for accelerator chips is not documented at all (like with GPUs), or detailed documentation is only available under NDA, and only proprietary development tools are available (like with FPGAs). The topology reminds me of this paper "The Landscape of Parallel Computing Research: A View from Berkeley" http://www.eecs.berkeley.edu/Pubs/TechRpts/2006/EECS-2006-183.pdf http://www.eecs.berkeley.edu/Pubs/TechRpts/2006/EECS-2006-18...
- lgeek 14y ago> the low-level ISA for accelerator chips is not documented at all (like with GPUs) Let me show you the AMD Southern Islands ISA specs: http://developer.amd.com/wordpress/media/2012/10/AMD_Southern_Islands_Instruction_Set_Architecture.pdf http://developer.amd.com/wordpress/media/2012/10/AMD_Souther...