7 ms·
This board should deliver about 90 GFLOPS of performance, or — in terms PC users understand — about the same horse-power as a 45GHz CPU. That doesn't seem t
by mtrimpe 14y ago
This board should deliver about 90 GFLOPS of performance, or — in terms
PC users understand — about the same horse-power as a 45GHz CPU.
That doesn't seem too outrageous to me.
Edit: They state the real fact and then give another figure explicitly stating it's an attempt to translate this into a metric the average user can somewhat relate to.
According to http://en.wikipedia.org/wiki/FLOPS#Computing http://en.wikipedia.org/wiki/FLOPS#Computing it seems that they're off by a factor of two, but I'm guessing that's just an honest mistake.
Second edit: I was under the impression that this was the result of dumbing down by a journalist, however it seems it's from Parallela itself. That is a bit disingenuous indeed.
- Xcelerate 14y agoMe neither. The only catch is that you can't get serial computation that fast, but I assume anyone buying something called "Parallella" would realize that already.
- Tuna-Fish 14y agoA single Ivy Bridge core has 8 Flops/MHz of computing power. 45GHz Ivy Bridge would be able to do 360GFlops.
- helpbygrace 14y agoIf you are correct for the first clause(8 Flops/MHz), 45GHz of Ivy Bridge core has 360k Flops (8 Flops/MHz * 45GHz ==> 8 Flops * 45k).
- danbruc 14y agoIt should read 8 FLOPS per cycle double precision. So a 3 GHz 4 core Ivy Bridge processor could theoretically peak at 96 GFLOPS double precision, 192 GFLOPS single precision.
- deleted 14y ago[deleted]
- stephencanon 14y ago8 double-precision flops/cycle/core is the correct figure for Ivy Bridge and Sandy Bridge. With Haswell adding FMA, that figure doubles again(!)
- mrb 14y agoHum, no. Sandy/Ivy Bridge can only execute 4 double-precision instructions per cycle per core, in the form of two SSE instructions per cycle (one instruction doing adds, the other doing muls, executed by different units). Doing 8 double-precision instructions per cycle would translate to either four 128-bit SSE instructions, or two 256-bit AVX instructions per cycle, which is not possible (unless I did not keep track of the latest AVX capabilities).
- kryptiskt 14y agoThe only reason it isn't a big lie is that it's an utterly meaningless statement. In any case it is a misrepresentation of what modern CPUs are capable of.
- phoyd 14y agoIt is 90 GFLOPS at less that 5 Watts. That's not too shabby. Adapteva claims that the Epiphany cores have a GFLOPS/W ratio of 50. See here: http://streamcomputing.eu/blog/2012-08-27/processors-that-can-do-20-gflops-watt/ http://streamcomputing.eu/blog/2012-08-27/processors-that-ca... Also, the boards for the backers feature a ZYNQ-7020 SOC by XILINX which sports a 1.3M Gate FPGA, available to the user. This ain't bad either.
- Uchikoma 14y agoMost others - like my MacBook here [1] - are advertising GHz / core not "summing" the cores. So the statement "PC users understand" is false. [1] http://store.apple.com/us/browse/home/shop_mac/family/macbook_pro http://store.apple.com/us/browse/home/shop_mac/family/macboo...
- marshray 14y agoBecause all of us dumb PC users measure performance in terms of "horse-power". :-)