3 ms·
That 3D "cross" graphic (Figure 1, "General Architecture") might be the worst illustration of a programmer's model for a CPU I've ever seen. I'm sure it makes
by unwind 14y ago
That 3D "cross" graphic (Figure 1, "General Architecture") might be the worst illustration of a programmer's model for a CPU I've ever seen.
I'm sure it makes sense after you've read the accompanying paragraph a sufficient number of times (once didn't cut it, for me), but not so sure it helps in that understanding.
I guess it's a funny hint that the x86's architecture is complex, when a figure that's just trying to describe the register names is this complex. :)
- stephencanon 14y agoThe ARMv7 VFP/NEON register layout is just as much fun. Maybe more when you add in the constraints that some instruction need to operate on consecutive registers, and some of them are required to begin on an even-numbered register.
- strags 14y agoI still don't get it. And I've done a bunch of Intel asm. Besides, there are 24 blue boxes and one yellow one. How does this relate to the "16 general purpose 64-bit registers"?
- acqq 14y agoThe pictures with 3 dimension axes have no sense at all. Speaking as somebody who made a reduced set assembly for x64. Did you find something really new or would you just like to confuse more?
- rraawwrr 14y agoI don't think thats the right graphic - a more reasonable graphic is in the PDF which the article is a copy of.
- bcoates 14y agoSomething's going horribly wrong, I'm seeing a screenshot of code to read and parse CPUID.