When I crafted my MIPS subset dual core CPU in a senior design class, I chose the 6502 method. That is, perform ADD, OR, XOR, etc in parallel at word width (tha

When I crafted my MIPS subset dual core CPU in a senior design class, I chose the 6502 method. That is, perform ADD, OR, XOR, etc in parallel at word width (that is 32 bits x the number of operations) and select the correct output using a multiplexer. The 8085 method seems smaller but I wonder how much delay it adds to the circuit. [edit] Here is my MIPS-- ALU in VHDL: https://github.com/jevinskie/mips--/blob/master/project4/source/alu_r.vhd https://github.com/jevinskie/mips--/blob/master/project4/sou... Quite simple, really. The hard part is the control lines and the cache!