3 ms·
not all architectures have atomic cas
by mathisfun123 12d ago
not all architectures have atomic cas
- loeg 12d agoReal architectures you'd run more than a single thread on? Such as?
- tom_ 11d agoQuad core ARMv8-A, e.g., Nintendo Switch.
- loeg 11d agoARMv8-A has atomic CAS, unless this is some silly definition thing where it's "a system that has the behavior of atomic CAS but is named something else."
- monster_truck 11d agoI don't think that came until 8.1
- tom_ 11d agoMaybe that's the trap I'm falling into? From memory it doesn't have any actually atomic operations, only an ll/sc sort of mechanism - which I've never really thought of as an atomic operation? Though it's true you can end up with the same end result, in that you can just keep trying the operation until you accidentally do a read-modify-write that's ended up - well, "atomic" is a valid way to describe it. So maybe it is good enough to count, though personally I'm still not quite convinced.
- loeg 11d agoYeah. I would call ll/sc atomic. Wikipedia's current verbiage: > Load-link returns the current value of a memory location, while a subsequent store-conditional to the same memory location will store a new value only if no updates have occurred to that location since the load-link. Together, this implements a lock-free, atomic, read–modify–write operation. https://en.wikipedia.org/wiki/Load-link/store-conditional https://en.wikipedia.org/wiki/Load-link/store-conditional