4 ms·
Any modern processor has different execution ports specialized in different things and replicated a different number of times, and all of them can execute instr
by mgaunard 21d ago
Any modern processor has different execution ports specialized in different things and replicated a different number of times, and all of them can execute instructions in parallel.
It schedules to these transparently for you, that's known as superscalar execution. To maximize occupation, out-of-order execution and simultaneous multithreading are used.
- Sharlin 21d agoSure, but this was five (or six?) generations before actual superscalar x86 processors.
- vlovich123 21d agoThree - after 8086 you had 80286, 80386, 80486 and then Pentium (superscalar).
- dpq 21d ago80186 is often forgotten to have existed because it didn't see much success in the market / because IBM skipped it and went with 80286 for the AT, but it did exist.
- vlovich123 21d agoThe 80186 didn’t really introduce anything new architecturally. It’s basically an 8086 with a few more chips bundled on-die. 80286 however introduced protected mode, expanded the address size to 24 bit, hardware enforce memory protection, multitasking, etc.
- pkaye 21d agoI believe 80186 was for embedded systems.
- librasteve 20d agonope
- hyperman1 20d ago80186 Was not IBM PC compatible. It had e.g. a PIC, DMA and timer built-in, and these were incompatible with the chips in a 8086 based IBM PC. There were a few new instructions, too, mostly closing holes. You could left or right shift with a constant, while the 8086 had only 1 or the CX register. I think mul also gained a constant. The fact that Intel released a CPU that could not be put in a PC probably indicates how low they estimated the survivability of the PC.
- icedchai 20d agoThere were "PC compatibles" that used it, like the Tandy 2000. You are correct in that they may not have been entirely compatible, but they did exist.
- hyperman1 19d agoI had a tandy of that era, with i think 64K ram. The incompatibilities were big enough that almost nothing could run.
- Sharlin 21d agoFour because you have to count 8086 itself (486 was one, not zero, geverations before the Pentium and so on).
- fulafel 21d agoTransparent scheduling of superscalar execution was a later advance in microprocessors, termed out of order execution. Apart from micros both did come out around the same time in the mid-1960s. In the x86 microarchitectures superscalar came in Pentium and OoO got introduced in Pentium Pro. (Superscalar is just having >1 pipelines, which at its introduction meant needing to manually schedule your code very carefully to take advantage of it absent the OoO execution. For example the frequently posted-about Doom optimizations and talk of the u and v pipes are about this. The scheduling didn't happen transparently in early superscalars, at best the cpu automatically stalled, and some archs (eg MIPS, i860, TI C3x) even visibly punted hardware detection of pipeline hazards and required the code to just not go there, see load delay slots and branch delay slots. )
- mgaunard 20d agoIt's already transparent even without out-of-order execution, and pipelining is an entirely different thing than superscalar execution.
- fulafel 19d agoI'd argue most people would consider it scheduling only if there's some attempt to arrange order of execution to improve throughput. Idling the other execution units when they could be executing instructions is not scheduling, at least not good scheduling. In estabilished computer architecture terminology, scheduling is decidedly a OoO execution term. (At least if you're talking about processors. There's also static scheduling, which means the compiler does it and the hardware doesn't.)
- mgaunard 17d agoThen most people would be wrong. A VLIW ISA is a classical example of a superscalar processor without out-of-order execution.