That's always fun. You just have to know your tools. That's why I tend to be very verbose and explicit in some aspects of my FPGA work. I rather not-so-gentl

That's always fun. You just have to know your tools. That's why I tend to be very verbose and explicit in some aspects of my FPGA work. I rather not-so-gently guide the tools towards what I want them to infer vs. what they sometimes think I want them to infer. Circuit inference is one aspect of HDL that sets it apart from writing software. To begin with, you are describing hardware and have to be aware of and live within the constraints it imposes. Then there's this inference thing that I've come to call my "secret contract" with the compiler: I say X and we agree that it is going to implement X12345 and we are all happy.