For small models it is very do-able on entry level FPGA. With a PYNQ-Z2 at int8 you could potentially fit 1m params. It would be a fun exercise in writing a inf

For small models it is very do-able on entry level FPGA. With a PYNQ-Z2 at int8 you could potentially fit 1m params. It would be a fun exercise in writing a inference driver and implementing systolic arrays on a FPGA.