3 ms·
Each connector will introduce "insertion loss" to the chain, eating into your signal integrity budget. The SO DIMM Ram slot, which is designed, idk, 30 years a
by mrheosuper 2mo ago
Each connector will introduce "insertion loss" to the chain, eating into your signal integrity budget.
The SO DIMM Ram slot, which is designed, idk, 30 years ago? is not really capable of handling the frequency we are targeting (close to 10GT/s)