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IBM's next-gen mainframe chip is the first to run Arm and Z workloads
- sillywalk 2mo ago"a base frequency above 5.7 GHz" and 36MB L2 caches. Also, I'm curious if there are any other dual/multi-ISA architecture chips that are really different and not just 64 bit extensions or things like THUMB. I found a 1994 patent[0] from Samsung for a Dual-instruction-set architecture CPU with hidden software emulation mode. IBM developed the PowerPC 615[1] that had either had an x86 core onboard, or it could translate x86 instruction into PowerPC ones. But it wasn't released. [0] https://patents.google.com/patent/US5781750A/en https://patents.google.com/patent/US5781750A/en [1] https://en.wikipedia.org/wiki/PowerPC_600#PowerPC_615 https://en.wikipedia.org/wiki/PowerPC_600#PowerPC_615
- justsomehnguy 2mo agohttps://en.wikipedia.org/wiki/Elbrus_2000 https://en.wikipedia.org/wiki/Elbrus_2000 https://en.wikipedia.org/wiki/Transmeta_Crusoe https://en.wikipedia.org/wiki/Transmeta_Crusoe Also notable mention: https://en.wikipedia.org/wiki/Compatibility_card https://en.wikipedia.org/wiki/Compatibility_card
- rbanffy 2mo agoThe NEC V20 and V30 used a superset of the 8086 ISA, and had instructions that allowed it to emulate an 8080 and mix 8080 and 8086 code. This is how CP/M was implemented on the platform. https://en.wikipedia.org/wiki/NEC_V20 https://en.wikipedia.org/wiki/NEC_V20 Sadly, it wasn’t Z80, which would have opened a lot of interesting possibilities for those chips. My first PC-clone was a V20 one.
- nxobject 2mo agoI’m surprised they’ve decided to do it on Z/Arch before POWER. The Visas of the world must have really wanted it! EDIT: d’oh, of course it’s so that they can sell more Linux LPARs.