4 ms·
> but it of course had many, many, MANY other performance issues. The whole RAMBUS debacle... OTH DDR chipsets for Tualatin had shown what it was the end game
by justsomehnguy 2mo ago
> but it of course had many, many, MANY other performance issues.
The whole RAMBUS debacle... OTH DDR chipsets for Tualatin had shown what it was the end game for the P6 arch.
- whaleofatw2022 2mo agoNot just the RAMBUS debacle, that 20 stage pipeline and IIRC the barrel shifter wasnt as good as on P3 or AMDs CPUs...