4 ms·
Sorry, haven't been following along, but sounds to me that the argument was a valid one seeing how it made the designers add new instructions. Not sure if ther
by torginus 2mo ago
Sorry, haven't been following along, but sounds to me that the argument was a valid one seeing how it made the designers add new instructions.
Not sure if there's an impact caused by the late addition as opposed to always having them, but considering this is a fairly core thing what a program does, not sure what degree of fragmentation this causes on the level of compilers and hardware.
x86 effectively killed innovation in the SIMD space by making instruction set support so fragmented, that people had to target the decade-old lowest denominator.
- wren6991 2mo agoThe arguments were against ISA-level fusion, since they can be fused in the uarch. See for example: https://www2.eecs.berkeley.edu/Pubs/TechRpts/2016/Archive/EECS-2016-130.pdf https://www2.eecs.berkeley.edu/Pubs/TechRpts/2016/Archive/EE...
- janwas 2mo agoNot seeing this at all. We routinely and easily target SSE4, AVX2, AVX-512 (in four variants) using the same application code in one binary. Frankly, this seems better to me than four separate RISC-V matmul extensions.