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I've been working on the Jane Street reverse engineering puzzle that was posted here a few days ago[0]. As usual I've not made much progress on the actual chall
by anitil 2mo ago
I've been working on the Jane Street reverse engineering puzzle that was posted here a few days ago[0]. As usual I've not made much progress on the actual challenge because I've fallen down a bunch of rabbit holes.
So far I've built a digital circuit simulator, a parser for my circuit design language, and now a parser for my simulator language (so I can run the sim on known inputs and have the machine enforce asserts for me). All to avoid the painful memories I have of verilog/vhdl.
If I don't come to my senses, the next thing is probably going to be a wave form viewer because I've wanted to use Raylib for a real project for a while now.
[0] edit: forgot link - https://blog.janestreet.com/can-you-reverse-engineer-an-asic/ https://blog.janestreet.com/can-you-reverse-engineer-an-asic...
- childintime 2mo agoWish you good luck. It feels like we still live in the stone age regarding the tools in circuit design. We need something easily written by LLM's.
- anitil 2mo agoThanks! I agree, I've only just started looking at the gds file and I keep thinking - 'is that it?'. But then, I guess there's thousands of different use cases, and this is the simplest format that works for all of them. If I every come up for air I should look in to hardcaml and maybe that will allow me to reach enlightenment