3 ms·
The cycle count for RDTSC is ~25 cycles on Skylake-era microarchitectures. The 49 number shown in the OP seems off.
by pbsd 2mo ago
The cycle count for RDTSC is ~25 cycles on Skylake-era microarchitectures. The 49 number shown in the OP seems off.
- phire 2mo agoIt's actually benchmarking 1000 repetitions of the RDTSC instruction running in parallel. My guess... On Skylake, multiple in-flight RDTSC instructions slow each other down for some reason? Possibly because it's attempting to provide a strict monotonic guarantee, that no two RSTSC instructions will return the same timestamp. Intel's manual only claims monotonic, which theoretically allows for two RSTSC instructions to return the same timestamp.