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I have no experience with ARM, but after decades of x86, low-level programming or OS development with RISC-V is such a breath of fresh air. Writing a simulator
by sph 3mo ago
I have no experience with ARM, but after decades of x86, low-level programming or OS development with RISC-V is such a breath of fresh air. Writing a simulator from scratch for the base ISA is like two days of work tops. I am using RISC-V as the instruction set for a bespoke virtual machine: why design a ISA when RISC-V is simple and modular? Bonus: all compilers can now target my VM.
It will accumulate cruft over the years like all other platforms, but right now, it is a joy to work in.
It’s not just for fun, but I’m betting on it because I hope Europe will finally build its own chips, and there is a good likelihood they will choose RISC-V over ARM; expertise in that field for EU developers might soon be a plus.
- sylware 3mo agoYep, I guess we are many to see what's happening with RISC-V. The most risk of cruft accumutation is in RVA... which is pursuing some level x86-64/ARM hardware compatibility. That said intel APX/AVX10.2 is RISC-V for x86-64...