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Is x86 ready to ACE it?
- supriyo-biswas 3mo agoGreat article. What does the (organizational) process look like to convert one of these specs to a processor product, does it go through a committee like the C++ standards?
- deadmutex 3mo ago> AMD, in partnership with Intel and the x86 EAG (Ecosystem Advisory Group) [EAG24], is readying ACE as the standard matrix acceleration architecture for x86, further enhancing the already vibrant x86 ecosystem. Source: https://x86ecosystem.org/wp-content/uploads/2026/03/ACE-Whitepaper-v1.pdf https://x86ecosystem.org/wp-content/uploads/2026/03/ACE-Whit...
- simonask 3mo ago"Vibrant" is certainly one way to describe it...
- aidenn0 3mo agoWith 8kb of registers for just this one feature, what does a modern process-control-block look like?
- monocasa 3mo agoOn x86, basically whatever XSAVE writes out. FWIW, I wouldn't be surprised if you only have a couple threads using this at a time max since it looks an awful lot Apple's AMX/SME stuff. Those Apple execution units only have single engines shared about per cluster. XSAVE lets you not bother saving register state that user space hasn't changed at the granularity of each large feature.
- fragmede 3mo agoAI Compute Extensions, ACE.
- rob74 3mo agoAlso, AMX = Advanced Matrix Extensions. Now I wonder how many such "extension packages" Intel (and AMD?) have introduced since MMX (which I believe was the first, and interestingly enough didn't have an official meaning - https://en.wikipedia.org/wiki/MMX_(instruction_set) https://en.wikipedia.org/wiki/MMX_(instruction_set)) in 1997?
- 3245t345f345g3 3mo agohttps://www.sandpile.org/x86/cpuid.htm#leaf_0000_0001h_more https://www.sandpile.org/x86/cpuid.htm#leaf_0000_0001h_more Then click "...details for the "generations" of Intel's vector instructions." Beware, it's dense acronym soup. :)
- ksec 3mo agoI assume Zen 6 won't support these, so we are looking Zen 7 at the earliest, which is 2028 earliest. In the meantime x86 don't have much in the roadmap that compete well with ARM vendor's offering. And that was before Nvidia decided to join the fight.
- ksec 3mo agoReplying to myself, turns out this is correct Zen 7 will have ACE and schedule to launch in 2028.
- rando1234 3mo agoCould the registers potentially be used to store encryption keys?
- rbanffy 3mo agoWell... They are registers, so yes. The question is whether it'd make sense to do it and what problem would that solve. In a past life, I taught young programmers you can, of course, make a phone number a numeric field in your database (and save a couple bytes by doing that!) but it'd only make sense if you wante to figure out the average phone number for all your clients so you could call them all at once. There are extreme cases where it would actually make sense, but that I usually left to dig into in a later discussion.
- benj111 3mo agoHow do you represent a leading 0? I don't know enough about phone numbers to say whether you could encode them as an int anyway. In the UK all standard numbers start 0 and international codes start 00? Of course you could introduce a 'locale' and then 20 years later try to solve that mess with multiple ways of representing international numbers. Or maybe not teach young programmers that you can make the phone number a numeric field? So it seems to me the solution is to save them as BCD...
- hilariously 3mo agoI think you and and your parent are in agreement, you CAN do something, but it's not useful, and then you have to either by convention or additional fields deal with the leading zeros and other non-numeric aspects of phone numbers. I would also teach young programmers (about data) with the shorthand used above, things like "Do you want to add phone numbers? Multiply them? Utilize fractional components? Why are we storing these as numbers?"
- benj111 3mo agoI'm not sure we are. My parent suggested you could, in the sense of why would you. I'm questioning if it's possible at all. And if so, is that just based on a local solution. Ie all numbers have an implicit 0 at the start. To me storing as a number to save space is a fine goal itself. The issue is the underlying complexity which a bare int can't capture. Suggesting using an int indicates the proposer hasn't thought about the issue. This isn't to say the parent was wrong person se. Asking why you are doing something is a good question. But also understanding the issue/complexity is important too. In the example I would say that saving space is a sufficient reason, so the point is moot. The reason why you wouldn't want to do it is because a phone number is not 'just a number' (I'm sure there's a mathematical term for a number where leading zeros are important etc).
- AussieWog93 3mo agoThis all went over my head, but does anyone know either how much faster this will make things (4x faster than AVX512 at 2048-bit??), and if unified memory plus a basic GPU will render this dead in the water?
- cogman10 3mo agoIt's impossible to say what sort of improvement (if anything) this will give. My assumption is the determining factor in performance is going to ultimately be memory bandwidth. > and if unified memory plus a basic GPU will render this dead in the water? Yeah, generally I think that is the case. The main benefit this thing would have is power consumption will likely be lower than what it is to send this operation to the GPU.
- usrusr 3mo agoWill the workloads exist? As in not going straight to something at least as dedicated as the Strix Halo CPU/GPU combo (with air quotes around the G)? Or the Apple max? Somehow I don't picture this as an attempt to make a full AI rig that just happens to be x86 in the housekeeping parts but just something that will make CPU inference a little less bad. In that case it would at best be a hedge against some low requirements use case becoming more important than expected, yet another unused spec sheet checkbox engineering marvel otherwise.
- rbanffy 3mo agoDedicated PCIe or memory-attached inference units will continue to exist, and will continue to do the heavy lifting, but an ISA extension provides latencies any external unit would have trouble matching. You can, with some work, extract some decent throughput with CPUs alone, with a large enough CPU you can use for non-AI jobs the rest of the time. There was a nice writeup not that long ago here on HN describing the flags and the reasoning behind them to use on that specific machine. Funny thing, I can't find the article.
- usrusr 3mo agoYeah, I guess in these days of hardware not getting completely outdated even after half a decade, it might well make sense to spend chip area on specialist units that are shut down almost the entire time. In the old days, when it was all about squeezing maximum performance from a given chip area budget you'd prefer using those transistors for some improvement of the general purpose parts, no matter how marginal. But now it's the thermal envelope, or power consumption of you prefer looking at it from that angle, and even slightly esoteric special purpose units can start making sense.
- rbanffy 3mo agoDark silicon is also a thermal management strategy. Areal usage can go down, spreading heat generation over a larger space and making cooling the chip easier.
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- nicole_express 3mo agoQuestionable acronym choice; immediately made me think of arbitrary code execution (which, you know, I would hope any processor would be capable of)
- rcleveng 3mo agoSounds interesting, I wonder if any of it will be available on consumer hardware. Making CUDA work across the stack seems to be the key thing that helped NVIDIA become the main purveyor of GPUs for AI. Apple seems to be doing well by the same approach. Last time I looked, anything remotely useful here was only on the Xeon chips, which means there'll be very few open source and even fewer non-corporate folks doing anything interesting with it. AMD seems to be better at that, maybe there's hope.