There are quite a few clever optimizations interplaying here. The use of bit-serial arithmetic, for instance, makes it possible to handle both FP16 and FP8 valu

There are quite a few clever optimizations interplaying here. The use of bit-serial arithmetic, for instance, makes it possible to handle both FP16 and FP8 values without much overhead. I wonder if the 2T0C DRAM could be used to directly feed a LUT, for FPGA applications. If so, that could greatly reduce their die size.