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Apple isn't just transitioning to TSMC's 2nm node, they are also transitioning to a chiplet based design using TSMC's advanced packaging. > What sets the A20 a

Apple isn't just transitioning to TSMC's 2nm node, they are also transitioning to a chiplet based design using TSMC's advanced packaging. > What sets the A20 apart isn’t just the node shrink—it’s the revolution in packaging. Apple is transitioning to Wafer-Level Multi-Chip Module (WLCM) integration, meaning that RAM will no longer be situated beside the chip, but rather on the chip wafer itself, integrated alongside the CPU, GPU, and Neural Engine. This shift eliminates the need for silicon interposers and substrates, thereby enhancing signal integrity, improving thermal dissipation, and facilitating faster memory access with lower latency. The benefits? Better multitasking, smoother AI processing (hello, Apple Intelligence), improved battery life, and potentially a smaller chip footprint—freeing up space for other components. https://hwbusters.com/news/apples-a20-chip-ushers-in-a-new-era-2nm-wmcm-and-the-future-of-the-iphone-18/ https://hwbusters.com/news/apples-a20-chip-ushers-in-a-new-e... It's entirely possible that TSMC is ramping up more slowly than expected.

monocasa 4mo ago
Do we have any explanations of what WLCM means that are more industry focused? I couldn't find anything that didn't look like blogspam. And that explanation of the DRAM being on the same wafer doesn't really make sense. For one, at that point there's no "multi chip" part if you're integrating more onto the same die rather than less. And their explanation isn't really passing the smell test for me for other reasons, for instance the fact that DRAM processes are pretty radically different than bulk logic processes, which wouldn't really let you put it all on the same wafer, much less the same die. Even back in the day when you had eDRAM blocks (like the Xbox 360's eDRAM die), that was really a DRAM process with a bit of logic cells that wouldn't be competitive if they weren't sitting right next to the DRAM blocks. I could be wrong here though, my examples are more than a bit long in the tooth.
- craigjb 4mo ago
  The terms to search for are fan-out wafer level packaging (FOWLP) and TSMC InFO. The chiplets come from different wafers and are reconstituted into a molded plastic wafer, allowing multiple die side-by-side. Then multiple layers of wires are built on top, terminating in a BGA.
  - monocasa 4mo ago
    Ok, part of my confusion was that it was being presented in contrast to InFO-oS and InFO-PoP, but it appears to mostly be a modified version of InFO-PoP called InFO-M? Because Apple has been using InFO-PoP for almost a decade at this point, starting with the A10.
    - craigjb 4mo ago
      Apple has not shipped an InFO-PoP with side-by-side integrated die yet. This is expected to be the first one, using RDLs for the die-to-die interconnect (so different than M-Ultra series that uses silicon bridges).
  - tanseydavid 4mo ago
    My astonishment at these manufacturing processes is never-ending.
- GeekyBear 4mo ago
  You can start by reading up on TSMC's name for the tech (although there are many versions at TSMC and TSMC isn't the only company packaging chiplets and memory on top of a silicon interposer). > CoWoS (Chip-on-Wafer-on-Substrate) https://semiwiki.com/wikis/industry-wikis/cowos-chip-on-wafer-on-substrate-wiki/ https://semiwiki.com/wikis/industry-wikis/cowos-chip-on-wafe... It's a more advanced update from their older InFO tech.
  - monocasa 4mo ago
    As your article states, they're already using CoWoS; that's not a new technology for Apple to adopt. Also, InFO-oS is a CoWoS technique.
    - GeekyBear 4mo ago
      InFO combines chiplets, but does not do so by bonding multiple chiplets directly to a silicon interposer as CoWoS does. The article compares CoWoS to InFO. > CoWoS uses a passive silicon interposer—etched with thousands of fine interconnects—that sits between the active dies and the package substrate. This interposer provides high-density connections between chiplets and supports memory integration, most notably High Bandwidth Memory (HBM) stacks. It also mentions that CoWoS is the tech used to build Nvidia's high end AI accelerators. > AI Accelerators: Nvidia H100, B100 (HBM3 via CoWoS) Apple is taking a tech that has previously only been used in very high end enterprise applications and is using it to make consumer SOCs starting with this years iPhone.
      - monocasa 4mo ago
        You're calling it CoWoS, but also said "this shift eliminates the need for silicon interposers", but also said "CoWoS uses a passive silicon interposer" Something's got to give here. I think it's your original article that's wrong, and it's poorly trying to describe InFO-M.
grogenaut 4mo ago
So far the only thing I've seen useful out of apple intelligence is running parakeet natively and effectively... which should have been their very first feature... given it's been on phones for 10+ years. As someone who wants to run effective llms locally for many things their other big benefit has been the unified memory studios for a small bit.
npunt 4mo ago
A kind request - please try to write HN replies without AI, but if you're going to, please at least edit out any "it's not X its Y" or "isn't just X, but also Y" AI tics. A lot of us come here to get away from talking to AIs all day.
- GeekyBear 4mo ago
  Is there anything less interesting on this site than baseless claims that other people's posts are AI?
  - gnabgib 4mo ago
    There are certainly more interesting things than you failing to defending your recent AI looking posts (c/w all the hallmarks).
- subarctic 4mo ago
  The comment you're replying to doesn't sound like AI to me
  - npunt 4mo ago
    It’s very obviously AI, several tells: ‘isn’t just / it’s also’ AI-ism should at least turn your AI radar on, then you get this weirdly formal structure that sounds like a trying-to-be-relatable press release: “This shift eliminates A, thereby enhancing B, improving C, and facilitating D. The benefits? Better U, smoother V (hello, W), improved X, and potentially Y—freeing up Z.” Question to self interjection, chipper ‘(hello, W)’ aside, topped off with a zero spaced emdash. 10000% AI, stylistically this isn’t text tuned to an HN audience, comments never sound like this. What’s funny is the paragraph it’s quoting has nearly the same style, the LLM probably picked that up. Not trying to call anyone out, just pointing out the stylistic tells we should all be aware of.
    - subarctic 4mo ago
      I've re-read the comment again and I'm convinced it's not ai. It uses a pattern that ai adopted but it seems like an actual genuine comment. This is based on my spidey senses so it's not something I'm going to debate logically but it seems quite a few people agree with me. And I've seen lots of annoying ai-written stuff, and of course use Claude and Chatgpt regularly

monocasa 4mo ago

Do we have any explanations of what WLCM means that are more industry focused? I couldn't find anything that didn't look like blogspam. And that explanation of the DRAM being on the same wafer doesn't really make sense. For one, at that point there's no "multi chip" part if you're integrating more onto the same die rather than less. And their explanation isn't really passing the smell test for me for other reasons, for instance the fact that DRAM processes are pretty radically different than bulk logic processes, which wouldn't really let you put it all on the same wafer, much less the same die. Even back in the day when you had eDRAM blocks (like the Xbox 360's eDRAM die), that was really a DRAM process with a bit of logic cells that wouldn't be competitive if they weren't sitting right next to the DRAM blocks. I could be wrong here though, my examples are more than a bit long in the tooth.

craigjb 4mo ago
The terms to search for are fan-out wafer level packaging (FOWLP) and TSMC InFO. The chiplets come from different wafers and are reconstituted into a molded plastic wafer, allowing multiple die side-by-side. Then multiple layers of wires are built on top, terminating in a BGA.
- monocasa 4mo ago
  Ok, part of my confusion was that it was being presented in contrast to InFO-oS and InFO-PoP, but it appears to mostly be a modified version of InFO-PoP called InFO-M? Because Apple has been using InFO-PoP for almost a decade at this point, starting with the A10.
  - craigjb 4mo ago
    Apple has not shipped an InFO-PoP with side-by-side integrated die yet. This is expected to be the first one, using RDLs for the die-to-die interconnect (so different than M-Ultra series that uses silicon bridges).
- tanseydavid 4mo ago
  My astonishment at these manufacturing processes is never-ending.
GeekyBear 4mo ago
You can start by reading up on TSMC's name for the tech (although there are many versions at TSMC and TSMC isn't the only company packaging chiplets and memory on top of a silicon interposer). > CoWoS (Chip-on-Wafer-on-Substrate) https://semiwiki.com/wikis/industry-wikis/cowos-chip-on-wafer-on-substrate-wiki/ https://semiwiki.com/wikis/industry-wikis/cowos-chip-on-wafe... It's a more advanced update from their older InFO tech.
- monocasa 4mo ago
  As your article states, they're already using CoWoS; that's not a new technology for Apple to adopt. Also, InFO-oS is a CoWoS technique.
  - GeekyBear 4mo ago
    InFO combines chiplets, but does not do so by bonding multiple chiplets directly to a silicon interposer as CoWoS does. The article compares CoWoS to InFO. > CoWoS uses a passive silicon interposer—etched with thousands of fine interconnects—that sits between the active dies and the package substrate. This interposer provides high-density connections between chiplets and supports memory integration, most notably High Bandwidth Memory (HBM) stacks. It also mentions that CoWoS is the tech used to build Nvidia's high end AI accelerators. > AI Accelerators: Nvidia H100, B100 (HBM3 via CoWoS) Apple is taking a tech that has previously only been used in very high end enterprise applications and is using it to make consumer SOCs starting with this years iPhone.
    - monocasa 4mo ago
      You're calling it CoWoS, but also said "this shift eliminates the need for silicon interposers", but also said "CoWoS uses a passive silicon interposer" Something's got to give here. I think it's your original article that's wrong, and it's poorly trying to describe InFO-M.

grogenaut 4mo ago

So far the only thing I've seen useful out of apple intelligence is running parakeet natively and effectively... which should have been their very first feature... given it's been on phones for 10+ years. As someone who wants to run effective llms locally for many things their other big benefit has been the unified memory studios for a small bit.

npunt 4mo ago

A kind request - please try to write HN replies without AI, but if you're going to, please at least edit out any "it's not X its Y" or "isn't just X, but also Y" AI tics. A lot of us come here to get away from talking to AIs all day.

GeekyBear 4mo ago
Is there anything less interesting on this site than baseless claims that other people's posts are AI?
- gnabgib 4mo ago
  There are certainly more interesting things than you failing to defending your recent AI looking posts (c/w all the hallmarks).
subarctic 4mo ago
The comment you're replying to doesn't sound like AI to me
- npunt 4mo ago
  It’s very obviously AI, several tells: ‘isn’t just / it’s also’ AI-ism should at least turn your AI radar on, then you get this weirdly formal structure that sounds like a trying-to-be-relatable press release: “This shift eliminates A, thereby enhancing B, improving C, and facilitating D. The benefits? Better U, smoother V (hello, W), improved X, and potentially Y—freeing up Z.” Question to self interjection, chipper ‘(hello, W)’ aside, topped off with a zero spaced emdash. 10000% AI, stylistically this isn’t text tuned to an HN audience, comments never sound like this. What’s funny is the paragraph it’s quoting has nearly the same style, the LLM probably picked that up. Not trying to call anyone out, just pointing out the stylistic tells we should all be aware of.
  - subarctic 4mo ago
    I've re-read the comment again and I'm convinced it's not ai. It uses a pattern that ai adopted but it seems like an actual genuine comment. This is based on my spidey senses so it's not something I'm going to debate logically but it seems quite a few people agree with me. And I've seen lots of annoying ai-written stuff, and of course use Claude and Chatgpt regularly