3 ms·
80386 Early Start Memory Access
- majke 3mo agoThis is great. So proper 386 on an fpga? How cool is that.
- NooneAtAll3 3mo agoI wonder what exactly stops windows from booting
- andrewf 3mo agohttps://nand2mario.github.io/posts/2026/z386/#testing https://nand2mario.github.io/posts/2026/z386/#testing gets into this sort of thing a bit more.
- nand2mario 3mo agoProbably some protected mode logic bugs. Just need more time to debug through the boot process.
- JdeBP 3mo agoI wouldn't be surprised if it is lurking in some part of (say) the TSS that you thought that you'd never have to implement.
- JdeBP 3mo agoI wonder how the logic worked in the previous version without early start. Was it relying upon the address calculation speed to settle the outputs really quickly? Was it inserting or stretching cycles?
- nand2mario 3mo agoThe memory pipeline just starts one cycle later than now. Effective address is calculated during the first cycle of the instruction. The microcode then waits for it to finish with the DLY (delay) micro-op, which releases one cycle later.
- JdeBP 3mo agoSo cycle insertion. I presume that the DLY was synthetic, and was not explicitly added to the microcode ROM.
- rasz 3mo agoWould this be related to Next Address (NA#) pin on the 386 enabling Address Pipelining?