3 ms·
Very nice. I wonder if implementing a one-instruction set computer (for example something that implements Adrian Cable's subleq VM, see https://www.ioccc.org/20
by gsliepen 4mo ago
Very nice. I wonder if implementing a one-instruction set computer (for example something that implements Adrian Cable's subleq VM, see https://www.ioccc.org/2025/cable/ https://www.ioccc.org/2025/cable/) would be educational and whether it can make the design of a computer from discrete logic chips simpler or more complex. Though it would very likely not be as efficient.
- jecel 4mo agoThe simplest processors use one clock per instruction with a Harvard architecture. This allows their control unit to be a combinational circuit instead of a Finite State Machine (and depending on how your memories work you might even avoid having an instruction register). Most one-instruction processors take multiple clocks and often need extra registers (for fetching 16 bit addresses from an 8 bit wide memory, for example) [1]. The four instruction MCPU [2] is not as bad to program as the one-instruction computers (it still needs 10 times as many instructions as a RISC-V, for example) while being very simple. Making it Harvard allows it to be slightly simpler and making it 16 bits allows it to run non trivial programs [3]. [1] https://github.com/jeceljr/SBN/blob/master/sbn.pdf https://github.com/jeceljr/SBN/blob/master/sbn.pdf [2] https://github.com/cpldcpu/MCPU https://github.com/cpldcpu/MCPU [3] https://github.com/jeceljr/digitalCPUzoo/tree/main/MCPU https://github.com/jeceljr/digitalCPUzoo/tree/main/MCPU