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Searching around github and found someone has put up a github repo with a Julia implementation of the article here including FPGA implementation of a KAN MNIST
by UncleOxidant 4mo ago
Searching around github and found someone has put up a github repo with a Julia implementation of the article here including FPGA implementation of a KAN MNIST classifier in Verilog. https://github.com/philtomson/KAN_LUT https://github.com/philtomson/KAN_LUT
- ag2718 4mo agoOur end-to-end implementation can be found here! https://github.com/Duchstf/KANELE https://github.com/Duchstf/KANELE