3 ms·
I've read about Xeon Phi a few months ago and I really want to get my hands on one. My problems are in the embarrassingly parallelizable class (or almost). Havi
by cefstat 14y ago
I've read about Xeon Phi a few months ago and I really want to get my hands on one. My problems are in the embarrassingly parallelizable class (or almost). Having said that, does anybody know how each Xeon Phi core performs with respect to a modern Intel processor (i7 or Xeon) for standard numerical code (Linpack etc.)?
- rys 14y agoThey're Pentium-class x86 cores and barely any more than front end control processors for the vector hardware. The fact it's x86 is almost incidental, IMHO; the vector ISA is all programmers should really care about on the Phi.
- berkut 14y agoI guess that means they've got primitive (Pentium Pro equivalent) branch predictors and memory pre-fetchers then? Are they even out-of-order? I.e. is it Pentium or Pentium Pro class?
- stonemetal 14y agohttp://www.anandtech.com/show/6451/the-xeon-phi-at-work-at-tacc http://www.anandtech.com/show/6451/the-xeon-phi-at-work-at-t... Each core is a simple in order x86 CPU (derived from the original Pentium) with a 512-bit SIMD unit.
- berkut 14y agoSo the branch predictors will be crap, but thanks to the hyperthreading, it probably won't be noticeable on most workloads...
- apendleton 14y agoMaybe I'm missing something, but do in-order architectures even have much use for branch prediction? They can't speculatively execute based on the outcome of a conditional, right?
- wtallis 14y agoSure they can. Branch prediction allows you to move an instruction along the pipeline before the instruction determining its outcome has been retired. Without branch prediction, every conditional jump will potentially stall the pipeline. With branch prediction, a correctly predicted branch executes quickly, and a mis-predicted branch results in a pipeline flush. Instruction re-ordering is more about taking full advantage of multiple execution units (ALUs, etc.), or not completely stalling the pipeline to wait on a memory fetch.
- rayiner 14y agoThey aren't quite so primitive. The Atom is also a Pentium-class in-order core. It may be Pentium class, but it's also running at ~2 GHz.
- sp332 14y agoI was curious about this, since the point is that you can run "Xeon" code on the Xeon Phi, but the Phi doesn't support SSE, MMX, or AVX so wouldn't you need to recompile to take advantage of the vector hardware?
- mich41 14y agoIIRC they'll be available to OEMs only. Anyway, Intel claimed 2-3x speedups over some unspecified dual socket Xeon system. http://www.tomshardware.com/reviews/xeon-phi-larrabee-stampede-hpc,3342-5.html http://www.tomshardware.com/reviews/xeon-phi-larrabee-stampe...