3 ms·
A number of the RISC processors have a special zero register, giving you a "mov reg, zero" instruction. Of course many of the RISC processors also have fixed l
by HarHarVeryFunny 6mo ago
A number of the RISC processors have a special zero register, giving you a "mov reg, zero" instruction.
Of course many of the RISC processors also have fixed length instructions, with small literal values being encoded as part of the instruction, so "mov reg, #0" and "mov reg, zero" would both be same length.