4 ms·
I saw the paper from Google last year and thought something in it aligned with not everything running through the microcode engine, though I could be wrong.
by lolsowrong 6mo ago
I saw the paper from Google last year and thought something in it aligned with not everything running through the microcode engine, though I could be wrong.
- fc417fc802 6mo agoMight well be the case. I don't think I'm familiar with the paper you're referring to; any chance of at least a vague description?
- lolsowrong 6mo agoCan’t find the pdf, but it’s all related to the zentool stuff: https://github.com/google/security-research/blob/master/pocs/cpus/entrysign/zentool/docs/intro.md https://github.com/google/security-research/blob/master/pocs... Tavis spells it out there pretty quickly: “ The simplest instructions (add, sub, mov, etc) are all implemented in hardware. The more complicated instructions like rdrand, fpatan and cmpxchg are microcoded. You can think of them as a bit like calling into a library of functions written in that RISC-like code.”