4 ms·
Aren't all of them microcoded? Some years back root was achieved on a line of intel processors and new instructions implemented as proof of concept. There's an
by fc417fc802 7mo ago
Aren't all of them microcoded? Some years back root was achieved on a line of intel processors and new instructions implemented as proof of concept. There's an academic paper, citation not immediately to hand.
- lolsowrong 7mo agoI saw the paper from Google last year and thought something in it aligned with not everything running through the microcode engine, though I could be wrong.
- fc417fc802 7mo agoMight well be the case. I don't think I'm familiar with the paper you're referring to; any chance of at least a vague description?
- lolsowrong 7mo agoCan’t find the pdf, but it’s all related to the zentool stuff: https://github.com/google/security-research/blob/master/pocs/cpus/entrysign/zentool/docs/intro.md https://github.com/google/security-research/blob/master/pocs... Tavis spells it out there pretty quickly: “ The simplest instructions (add, sub, mov, etc) are all implemented in hardware. The more complicated instructions like rdrand, fpatan and cmpxchg are microcoded. You can think of them as a bit like calling into a library of functions written in that RISC-like code.”
- trynumber9 7mo agoSome instructions are microcoded but others take the fast path and avoid the microcode sequencer. Can't patch the latter in microcode RAM.