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Bit manipulation instructions are part and parcel of any curriculum that teaches CPU architecture. They are the basic building blocks for many more complex inst
by jacquesm 8mo ago
Bit manipulation instructions are part and parcel of any curriculum that teaches CPU architecture. They are the basic building blocks for many more complex instructions.
https://five-embeddev.com/riscv-bitmanip/1.0.0/bitmanip.html https://five-embeddev.com/riscv-bitmanip/1.0.0/bitmanip.html
I can see quite a few items on that list that imnsho should have been included in the core and for the life of me I can't see the rationale behind leaving them out. Even the most basic 8 bit CPU had various shifts and rolls baked in.
- rwmj 8mo agoThis is the reason behind the profiles like RVA23 which include bitmanip, vector and a large number of other extensions. Real chips coming very soon will all be RVA23.
- jacquesm 8mo agoNeat. I can't wait to get my hands on a devboard.
- NekkoDroid 8mo agoThe earlierst I know of coming is the SpaceMit K3, which Sipeed will have dev boards for.
- statusfailed 8mo agoThe Milk-V Jupiter 2 (coming out in April) is RV23 too
- jacquesm 8mo agoNice board but very low on max RAM.
- rwmj 8mo agoThe Milk-V Titan (https://milkv.io/titan https://milkv.io/titan) can take up to 64GB which is fine considering the number of cores and the cost of RAM. If you needed and could afford more RAM you'd be better off distributing the work across more than one board.
- jacquesm 8mo agoI simply want to replace my desktop with open hardware. That board would be fine, thank you for the pointer.
- rwmj 8mo agoUnfortunately they found a bug and had to redesign the boards. I've had one of these on pre-order since last year. Latest is I think they're intending to ship them next month (April). The SpacemiT K3 (https://www.spacemit.com/products/keystone/k3 https://www.spacemit.com/products/keystone/k3 https://www.cnx-software.com/2026/01/23/spacemit-k3-16-core-risc-v-soc-system-information-and-early-benchmarks/ https://www.cnx-software.com/2026/01/23/spacemit-k3-16-core-...) is the one everyone is waiting for. We have one in house (as usual, cannot discuss benchmarks, but it's good). Unfortunately I don't think there is anyone reputable offering pre-orders yet.
- jacquesm 8mo agoOk! I will keep an eye out. It is one of the most interesting developments for me hardware wise in the last decade, and I definitely want to show my support by buying one or more of the boards. Respin is always really annoying this late in, the post mortem on that must make for interesting reading. You're super lucky to have your hands on one!
- kevin_thibedeau 8mo ago32-bit barrel shifters consume significant area and RISC-V was developed to support resource constrained low cost embedded hardware in a minimal ISA implementation.
- jacquesm 8mo agoYou can save a lot of silicon by doing 8 or 16 bit shifters and then doing the rest at the code generation level. Not having any seems really anemic to me.
- adgjlsfhk1 8mo agoIIUC this is a lot less true in the modern era. Even with 24nm transistors (the cheapest transistor last time I checked), modern microcontrollers have a fairly big transistor budget for the core (since 80+% of the transistors are going to sram anyway).
- pezezin 8mo agoThe 32-bit ARM architecture included a barrel shifter as part of its basic design, as in every instruction had a shift field. If a CPU built in 1985 with a grand total of 26 000 transistors could afford it, I am pretty sure that anything built in this century could afford it too.
- snvzz 8mo ago26k is a lot of transistors for an embedded MCU. You'd be excluding many small CPUs which exist within other chips running very specialized code. As profiles mandate these instructions anyway, there's no good reason to complicate the most basic RISC-V possible. RISC-V is the ISA for everything, from the smallest such CPUs to supercomputers.
- wk_end 8mo agoWhat MCUs are you thinking of? To the best of my knowledge (and Google-fu), 26K really isn't a lot of transistors for an embedded MCU - at least not a fully-featured 32-bit one comparable to a minimal RISC-V core. An ARM Cortex M0, which is pretty much the smallest thing out there, is around 10K gates => around 40K transistors. This is also around the same size as a minimal RISC-V core AFAICT. The ARM core has a shifter, though.
- bmenrigh 8mo agoYeah I don’t get it. Shifts and rolls are among the simplest of all instructions to implement because they can be done with just wires, zero gates. Hard to imagine a justification for leaving them out.