7 ms·
That's a very small effect in the overall decoding of an instruction even in a pure interpretive emulator, and undetectable in a JIT. Also MIPS code is much la
by brucehoult 7mo ago
That's a very small effect in the overall decoding of an instruction even in a pure interpretive emulator, and undetectable in a JIT.
Also MIPS code is much larger.
- dmitrygr 7mo agoEntirely disagreed. In a simple step by step emulator it can be as much as 30% of the time spent. In a jit indeed it is less of an effect.
- thesz 7mo agoMIPS code is not much larger. There are two interesting differences of ISA between MIPS and RISC-V: that MIPS does not have branch on condition, only on zero/non-zero and that MIPS has 16 bit immediates with appropriate sign extension (all zeroes for ORI, all ones for ANDI). The first difference makes MIPS programs about 10% larger and second difference makes MIPS programs smaller (RISC-V immediates are 11.5 bits due to mandatory sign extension, 13 bits are required to cover 95% of immediates in MIPS-like scheme), a percent or so, I think.
- dmitrygr 7mo agoANDI is not 1-extended (though that would be nice) it is 0-extended. MIPS only has 2 extension modes for immediates - sign extended and zero-extended. all logical ops are 0-extended, all arith ops are sign extended.
- thesz 7mo agoThanks. My memory failed me, I've implemented MIPS 18 years ago.