4 ms·
MIPS (the arch of which RISCV is mostly a copy) is even easier to emulate, unlike RV it does not scatter immediate bits al over the instruction word, making it
by dmitrygr 8mo ago
MIPS (the arch of which RISCV is mostly a copy) is even easier to emulate, unlike RV it does not scatter immediate bits al over the instruction word, making it easier for an emulator to get immediates. If you need emulated perf, MIPS is the easiest of all
- brucehoult 8mo agoThat's a very small effect in the overall decoding of an instruction even in a pure interpretive emulator, and undetectable in a JIT. Also MIPS code is much larger.
- dmitrygr 8mo agoEntirely disagreed. In a simple step by step emulator it can be as much as 30% of the time spent. In a jit indeed it is less of an effect.
- thesz 8mo agoMIPS code is not much larger. There are two interesting differences of ISA between MIPS and RISC-V: that MIPS does not have branch on condition, only on zero/non-zero and that MIPS has 16 bit immediates with appropriate sign extension (all zeroes for ORI, all ones for ANDI). The first difference makes MIPS programs about 10% larger and second difference makes MIPS programs smaller (RISC-V immediates are 11.5 bits due to mandatory sign extension, 13 bits are required to cover 95% of immediates in MIPS-like scheme), a percent or so, I think.
- dmitrygr 8mo agoANDI is not 1-extended (though that would be nice) it is 0-extended. MIPS only has 2 extension modes for immediates - sign extended and zero-extended. all logical ops are 0-extended, all arith ops are sign extended.
- thesz 8mo agoThanks. My memory failed me, I've implemented MIPS 18 years ago.
- anthk 8mo agoMIPS Linux ELF interpreter in Perl: http://blog.schmorp.de/2015-06-08-emulating-linux-mips-in-perl-1.html http://blog.schmorp.de/2015-06-08-emulating-linux-mips-in-pe...